Smart Hire - TBSL Jobs | FPGA Design And Verification Job | Jobs In Hyderabad/ Secunderabad ,Bengaluru/ Bangalore ,Noida/ Greater Noida ,Visakhapatnam
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Position: Project Engineer, Sr. Project Engineer, Tech Lead, Project Lead, Project Manager and Program Manager
Standards How to Apply? Registered User Click on the apply button Login to TimesJobs (if not logged in) Select profile (in case of multiple profiles) Get job application confirmation message Non-Registered User Click on the apply button On Login page, click on register now button Complete our two step registration process Get job application confirmation message Job Profile KEY SKILLS FPGA Design Verification , "System Verilog" , OVM , UVM , VHDL QUALIFICATION Post Graduation - ME/M.Tech (Computers, Electrical, Electronics/Telecommunication ) School & Graduation - BE/B.Tech (Computers, Electrical, Electronics/Telecommunication ) SPECIALIZATION EDA/VLSI/ASIC/Chip Designing JOB FUNCTION Electronics INDUSTRY IT-Hardware/Networking Job Posted on: 06 Jun, 2012 Job ID: 50651324 Job Description Position: Project Engineer, Sr.Project Engineer, Tech Lead, Project Lead, Project Manager and Program Manager Experience in design, verification & validation for FPGA based systems. Expertise in verification using system verilog (OVM/UVM), Verilog or VHDL. FPGA based design implementation on Actel, ALTERA, XILINX. Experiece in Aerospace or Rail Domain would be an added advantage.
20 Jun 2012